EDN

Rapid Validation of Post-Silicon Devices Using Verification IP

A well-repeated truism throughout the semiconductor industry is that chip design verification is complex and often takes up the largest portion of a design project’s schedule –– sometimes as much as ...
Design-Reuse

T&VS provides solution to Post Silicon Validation

Validation is a quality assurance process to establish a high degree of assurance that a product, service, or system accomplishes its intended requirements. The aim was to exercise the design to check ...
Semiconductor Engineering

Using ML For Post-Silicon Validation

Ira Leventhal, vice president of Advantest’s new concept product initiative, talks about how to use machine learning to ferret out hidden relationships in a complex design and to utilize that data to ...
EDN

ARM intrusive debugging for post-silicon SoC validation

Debugging large RTL projects has become increasingly complex. With different types of applications evolving, there is a need for different ways to enable debug hooks in every application. Although the ...